47
libraries/HAL_Drivers/config/g0/adc_config.h
Normal file
47
libraries/HAL_Drivers/config/g0/adc_config.h
Normal file
@@ -0,0 +1,47 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-01-05 zylx first version
|
||||
* 2019-01-08 SummerGift clean up the code
|
||||
*/
|
||||
|
||||
#ifndef __ADC_CONFIG_H__
|
||||
#define __ADC_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ADC1
|
||||
#ifndef ADC1_CONFIG
|
||||
#define ADC1_CONFIG \
|
||||
{ \
|
||||
.Instance = ADC1, \
|
||||
.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1, \
|
||||
.Init.Resolution = ADC_RESOLUTION_12B, \
|
||||
.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
|
||||
.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD, \
|
||||
.Init.EOCSelection = ADC_EOC_SINGLE_CONV, \
|
||||
.Init.LowPowerAutoWait = DISABLE, \
|
||||
.Init.LowPowerAutoPowerOff = DISABLE, \
|
||||
.Init.ContinuousConvMode = DISABLE, \
|
||||
.Init.DiscontinuousConvMode = ENABLE, \
|
||||
.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
|
||||
.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \
|
||||
.Init.DMAContinuousRequests = ENABLE, \
|
||||
.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN, \
|
||||
}
|
||||
#endif /* ADC1_CONFIG */
|
||||
#endif /* BSP_USING_ADC1 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ADC_CONFIG_H__ */
|
||||
93
libraries/HAL_Drivers/config/g0/dma_config.h
Normal file
93
libraries/HAL_Drivers/config/g0/dma_config.h
Normal file
@@ -0,0 +1,93 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-01-05 zylx first version
|
||||
* 2019-01-08 SummerGift clean up the code
|
||||
*/
|
||||
|
||||
#ifndef __DMA_CONFIG_H__
|
||||
#define __DMA_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* DMA1 channel1 */
|
||||
#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
|
||||
#define SPI1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
|
||||
#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define SPI1_RX_DMA_INSTANCE DMA1_Channel1
|
||||
#define SPI1_RX_DMA_REQUEST DMA_REQUEST_SPI1_RX
|
||||
#define SPI1_RX_DMA_IRQ DMA1_Channel1_IRQn
|
||||
#ifdef BSP_UART1_RX_USING_DMA
|
||||
#undef BSP_UART1_RX_USING_DMA
|
||||
#endif
|
||||
#ifdef BSP_SPI2_RX_USING_DMA
|
||||
#undef BSP_SPI2_RX_USING_DMA
|
||||
#endif
|
||||
#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
|
||||
#define UART1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
|
||||
#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define UART1_RX_DMA_INSTANCE DMA1_Channel1
|
||||
#define UART1_RX_DMA_REQUEST DMA_REQUEST_USART1_RX
|
||||
#define UART1_RX_DMA_IRQ DMA1_Channel1_IRQn
|
||||
#ifdef BSP_SPI2_RX_USING_DMA
|
||||
#undef BSP_SPI2_RX_USING_DMA
|
||||
#endif
|
||||
#elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
|
||||
#define SPI2_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
|
||||
#define SPI2_RX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define SPI2_RX_DMA_INSTANCE DMA1_Channel1
|
||||
#define SPI2_RX_DMA_REQUEST DMA_REQUEST_SPI2_RX
|
||||
#define SPI2_RX_DMA_IRQ DMA1_Channel1_IRQn
|
||||
#endif
|
||||
|
||||
/* DMA1 channle2-3 */
|
||||
#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
|
||||
#define SPI1_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler
|
||||
#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define SPI1_TX_DMA_INSTANCE DMA1_Channel2
|
||||
#define SPI1_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX
|
||||
#define SPI1_TX_DMA_IRQ DMA1_Channel2_3_IRQn
|
||||
#ifdef BSP_UART2_RX_USING_DMA
|
||||
#undef BSP_UART2_RX_USING_DMA
|
||||
#endif
|
||||
#ifdef BSP_SPI2_TX_USING_DMA
|
||||
#undef BSP_SPI2_TX_USING_DMA
|
||||
#endif
|
||||
#elif defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
|
||||
#define UART2_DMA_RX_IRQHandler DMA1_Channel2_3_IRQHandler
|
||||
#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define UART2_RX_DMA_INSTANCE DMA1_Channel2
|
||||
#define UART2_RX_DMA_REQUEST DMA_REQUEST_USART2_RX
|
||||
#define UART2_RX_DMA_IRQ DMA1_Channel2_3_IRQn
|
||||
#ifdef BSP_SPI2_TX_USING_DMA
|
||||
#undef BSP_SPI2_TX_USING_DMA
|
||||
#endif
|
||||
#elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
|
||||
#define SPI2_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler
|
||||
#define SPI2_TX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define SPI2_TX_DMA_INSTANCE DMA1_Channel2
|
||||
#define SPI2_TX_DMA_REQUEST DMA_REQUEST_SPI2_TX
|
||||
#define SPI2_TX_DMA_IRQ DMA1_Channel2_3_IRQn
|
||||
#endif
|
||||
|
||||
#if defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE)
|
||||
#define LPUART1_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
|
||||
#define LPUART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
|
||||
#define LPUART1_RX_DMA_INSTANCE DMA1_Channel5
|
||||
#define LPUART1_RX_DMA_REQUEST DMA_REQUEST_LPUART1_RX
|
||||
#define LPUART1_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __DMA_CONFIG_H__ */
|
||||
47
libraries/HAL_Drivers/config/g0/pwm_config.h
Normal file
47
libraries/HAL_Drivers/config/g0/pwm_config.h
Normal file
@@ -0,0 +1,47 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-01-05 zylx first version
|
||||
* 2019-01-08 SummerGift clean up the code
|
||||
*/
|
||||
|
||||
#ifndef __PWM_CONFIG_H__
|
||||
#define __PWM_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_PWM2
|
||||
#ifndef PWM2_CONFIG
|
||||
#define PWM2_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM2, \
|
||||
.name = "pwm2", \
|
||||
.channel = 0 \
|
||||
}
|
||||
#endif /* PWM2_CONFIG */
|
||||
#endif /* BSP_USING_PWM2 */
|
||||
|
||||
#ifdef BSP_USING_PWM3
|
||||
#ifndef PWM3_CONFIG
|
||||
#define PWM3_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM3, \
|
||||
.name = "pwm3", \
|
||||
.channel = 0 \
|
||||
}
|
||||
#endif /* PWM2_CONFIG */
|
||||
#endif /* BSP_USING_PWM2 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __PWM_CONFIG_H__ */
|
||||
98
libraries/HAL_Drivers/config/g0/spi_config.h
Normal file
98
libraries/HAL_Drivers/config/g0/spi_config.h
Normal file
@@ -0,0 +1,98 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-01-05 zylx first version
|
||||
* 2019-01-08 SummerGift clean up the code
|
||||
*/
|
||||
|
||||
#ifndef __SPI_CONFIG_H__
|
||||
#define __SPI_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
#ifndef SPI1_BUS_CONFIG
|
||||
#define SPI1_BUS_CONFIG \
|
||||
{ \
|
||||
.Instance = SPI1, \
|
||||
.bus_name = "spi1", \
|
||||
.irq_type = SPI1_IRQn, \
|
||||
}
|
||||
#endif /* SPI1_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI1 */
|
||||
|
||||
#ifdef BSP_SPI1_TX_USING_DMA
|
||||
#ifndef SPI1_TX_DMA_CONFIG
|
||||
#define SPI1_TX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI1_TX_DMA_RCC, \
|
||||
.Instance = SPI1_TX_DMA_INSTANCE, \
|
||||
.request = SPI1_TX_DMA_REQUEST, \
|
||||
.dma_irq = SPI1_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI1_TX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI1_TX_USING_DMA */
|
||||
|
||||
#ifdef BSP_SPI1_RX_USING_DMA
|
||||
#ifndef SPI1_RX_DMA_CONFIG
|
||||
#define SPI1_RX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI1_RX_DMA_RCC, \
|
||||
.Instance = SPI1_RX_DMA_INSTANCE, \
|
||||
.request = SPI1_RX_DMA_REQUEST, \
|
||||
.dma_irq = SPI1_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI1_RX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI1_RX_USING_DMA */
|
||||
|
||||
#ifdef BSP_USING_SPI2
|
||||
#ifndef SPI2_BUS_CONFIG
|
||||
#define SPI2_BUS_CONFIG \
|
||||
{ \
|
||||
.Instance = SPI2, \
|
||||
.bus_name = "spi2", \
|
||||
.irq_type = SPI2_IRQn, \
|
||||
}
|
||||
#endif /* SPI2_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI2 */
|
||||
|
||||
#ifdef BSP_SPI2_TX_USING_DMA
|
||||
#ifndef SPI2_TX_DMA_CONFIG
|
||||
#define SPI2_TX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI2_TX_DMA_RCC, \
|
||||
.Instance = SPI2_TX_DMA_INSTANCE, \
|
||||
.request = SPI2_TX_DMA_REQUEST, \
|
||||
.dma_irq = SPI2_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI2_TX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI2_TX_USING_DMA */
|
||||
|
||||
#ifdef BSP_SPI2_RX_USING_DMA
|
||||
#ifndef SPI2_RX_DMA_CONFIG
|
||||
#define SPI2_RX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI2_RX_DMA_RCC, \
|
||||
.Instance = SPI2_RX_DMA_INSTANCE, \
|
||||
.request = SPI2_RX_DMA_REQUEST, \
|
||||
.dma_irq = SPI2_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI2_RX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI2_RX_USING_DMA */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SPI_CONFIG_H__ */
|
||||
|
||||
|
||||
|
||||
57
libraries/HAL_Drivers/config/g0/tim_config.h
Normal file
57
libraries/HAL_Drivers/config/g0/tim_config.h
Normal file
@@ -0,0 +1,57 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-01-05 zylx first version
|
||||
* 2019-01-08 SummerGift clean up the code
|
||||
*/
|
||||
|
||||
#ifndef __TIM_CONFIG_H__
|
||||
#define __TIM_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifndef TIM_DEV_INFO_CONFIG
|
||||
#define TIM_DEV_INFO_CONFIG \
|
||||
{ \
|
||||
.maxfreq = 1000000, \
|
||||
.minfreq = 2000, \
|
||||
.maxcnt = 0xFFFF, \
|
||||
.cntmode = HWTIMER_CNTMODE_UP, \
|
||||
}
|
||||
#endif /* TIM_DEV_INFO_CONFIG */
|
||||
|
||||
#ifdef BSP_USING_TIM2
|
||||
#ifndef TIM2_CONFIG
|
||||
#define TIM2_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM2, \
|
||||
.tim_irqn = TIM2_IRQn, \
|
||||
.name = "timer2", \
|
||||
}
|
||||
#endif /* TIM2_CONFIG */
|
||||
#endif /* BSP_USING_TIM2 */
|
||||
|
||||
#ifdef BSP_USING_TIM3
|
||||
#ifndef TIM3_CONFIG
|
||||
#define TIM3_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM3, \
|
||||
.tim_irqn = TIM3_IRQn, \
|
||||
.name = "timer3", \
|
||||
}
|
||||
#endif /* TIM3_CONFIG */
|
||||
#endif /* BSP_USING_TIM3 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __TIM_CONFIG_H__ */
|
||||
244
libraries/HAL_Drivers/config/g0/uart_config.h
Normal file
244
libraries/HAL_Drivers/config/g0/uart_config.h
Normal file
@@ -0,0 +1,244 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-10-30 zylx first version
|
||||
*/
|
||||
|
||||
#ifndef __UART_CONFIG_H__
|
||||
#define __UART_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_LPUART1)
|
||||
#ifndef LPUART1_CONFIG
|
||||
#define LPUART1_CONFIG \
|
||||
{ \
|
||||
.name = "lpuart1", \
|
||||
.Instance = LPUART1, \
|
||||
.irq_type = USART3_4_LPUART1_IRQn, \
|
||||
}
|
||||
#define LPUART1_IRQHandler USART3_4_LPUART1_IRQHandler
|
||||
#endif /* LPUART1_CONFIG */
|
||||
#if defined(BSP_LPUART1_RX_USING_DMA)
|
||||
#ifndef LPUART1_DMA_CONFIG
|
||||
#define LPUART1_DMA_CONFIG \
|
||||
{ \
|
||||
.Instance = LPUART1_RX_DMA_INSTANCE, \
|
||||
.request = LPUART1_RX_DMA_REQUEST, \
|
||||
.dma_rcc = LPUART1_RX_DMA_RCC, \
|
||||
.dma_irq = LPUART1_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* LPUART1_DMA_CONFIG */
|
||||
#endif /* BSP_LPUART1_RX_USING_DMA */
|
||||
#endif /* BSP_USING_LPUART1 */
|
||||
|
||||
#if defined(BSP_USING_UART1)
|
||||
#ifndef UART1_CONFIG
|
||||
#define UART1_CONFIG \
|
||||
{ \
|
||||
.name = "uart1", \
|
||||
.Instance = USART1, \
|
||||
.irq_type = USART1_IRQn, \
|
||||
}
|
||||
#endif /* UART1_CONFIG */
|
||||
#endif /* BSP_USING_UART1 */
|
||||
|
||||
#if defined(BSP_UART1_RX_USING_DMA)
|
||||
#ifndef UART1_DMA_RX_CONFIG
|
||||
#define UART1_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART1_RX_DMA_INSTANCE, \
|
||||
.request = UART1_RX_DMA_REQUEST, \
|
||||
.dma_rcc = UART1_RX_DMA_RCC, \
|
||||
.dma_irq = UART1_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART1_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART1_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_USING_UART2)
|
||||
#ifndef UART2_CONFIG
|
||||
#if defined(STM32G0B1xx) || defined(STM32G0C1xx)
|
||||
#define UART2_CONFIG \
|
||||
{ \
|
||||
.name = "uart2", \
|
||||
.Instance = USART2, \
|
||||
.irq_type = USART2_LPUART2_IRQn , \
|
||||
}
|
||||
#else
|
||||
#define UART2_CONFIG \
|
||||
{ \
|
||||
.name = "uart2", \
|
||||
.Instance = USART2, \
|
||||
.irq_type = USART2_IRQn, \
|
||||
}
|
||||
#endif /* defined(STM32G0B1xx) || defined(STM32G0C1xx) */
|
||||
#endif /* UART2_CONFIG */
|
||||
#endif /* BSP_USING_UART2 */
|
||||
|
||||
#if defined(BSP_UART2_RX_USING_DMA)
|
||||
#ifndef UART2_DMA_RX_CONFIG
|
||||
#define UART2_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART2_RX_DMA_INSTANCE, \
|
||||
.request = UART2_RX_DMA_REQUEST, \
|
||||
.dma_rcc = UART2_RX_DMA_RCC, \
|
||||
.dma_irq = UART2_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART2_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART2_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_USING_UART3)
|
||||
#ifndef UART3_CONFIG
|
||||
#if defined(STM32G0B1xx) || defined(STM32G0C1xx)
|
||||
#define UART3_CONFIG \
|
||||
{ \
|
||||
.name = "uart3", \
|
||||
.Instance = USART3, \
|
||||
.irq_type = USART3_4_5_6_LPUART1_IRQn, \
|
||||
}
|
||||
#elif defined(STM32G070xx)
|
||||
#define UART3_CONFIG \
|
||||
{ \
|
||||
.name = "uart3", \
|
||||
.Instance = USART3, \
|
||||
.irq_type = USART3_4_IRQn, \
|
||||
}
|
||||
#elif defined(STM32G071xx) || defined(STM32G081xx)
|
||||
#define UART3_CONFIG \
|
||||
{ \
|
||||
.name = "uart3", \
|
||||
.Instance = USART3, \
|
||||
.irq_type = USART3_4_LPUART1_IRQn, \
|
||||
}
|
||||
#elif defined(STM32G0B0xx)
|
||||
#define UART3_CONFIG \
|
||||
{ \
|
||||
.name = "uart3", \
|
||||
.Instance = USART3, \
|
||||
.irq_type = USART3_4_5_6_IRQn, \
|
||||
}
|
||||
#else
|
||||
#define UART3_CONFIG \
|
||||
{ \
|
||||
.name = "uart3", \
|
||||
.Instance = USART3, \
|
||||
.irq_type = USART3_IRQn, \
|
||||
}
|
||||
#endif /* defined(STM32G0B1xx) || defined(STM32G0C1xx) */
|
||||
#endif /* UART3_CONFIG */
|
||||
#endif /* BSP_USING_UART3 */
|
||||
|
||||
#if defined(BSP_UART3_RX_USING_DMA)
|
||||
#ifndef UART3_DMA_RX_CONFIG
|
||||
#define UART3_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART3_RX_DMA_INSTANCE, \
|
||||
.request = UART3_RX_DMA_REQUEST, \
|
||||
.dma_rcc = UART3_RX_DMA_RCC, \
|
||||
.dma_irq = UART3_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART3_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART3_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_USING_UART4)
|
||||
#ifndef UART4_CONFIG
|
||||
#if defined(STM32G0B1xx) || defined(STM32G0C1xx)
|
||||
#define UART4_CONFIG \
|
||||
{ \
|
||||
.name = "uart4", \
|
||||
.Instance = USART4, \
|
||||
.irq_type = USART3_4_5_6_LPUART1_IRQn, \
|
||||
}
|
||||
#elif defined(STM32G070xx)
|
||||
#define UART4_CONFIG \
|
||||
{ \
|
||||
.name = "uart4", \
|
||||
.Instance = USART4, \
|
||||
.irq_type = USART3_4_IRQn, \
|
||||
}
|
||||
#elif defined(STM32G071xx) || defined(STM32G081xx)
|
||||
#define UART4_CONFIG \
|
||||
{ \
|
||||
.name = "uart4", \
|
||||
.Instance = USART4, \
|
||||
.irq_type = USART3_4_LPUART1_IRQn, \
|
||||
}
|
||||
#elif defined(STM32G0B0xx)
|
||||
#define UART4_CONFIG \
|
||||
{ \
|
||||
.name = "uart4", \
|
||||
.Instance = USART4, \
|
||||
.irq_type = USART3_4_5_6_IRQn, \
|
||||
}
|
||||
#else
|
||||
#define UART4_CONFIG \
|
||||
{ \
|
||||
.name = "uart4", \
|
||||
.Instance = USART4, \
|
||||
.irq_type = USART4_IRQn, \
|
||||
}
|
||||
#endif /* defined(STM32G0B1xx) || defined(STM32G0C1xx) */
|
||||
#endif /* UART4_CONFIG */
|
||||
#endif /* BSP_USING_UART4 */
|
||||
|
||||
#if defined(BSP_UART4_RX_USING_DMA)
|
||||
#ifndef UART4_DMA_RX_CONFIG
|
||||
#define UART4_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART4_RX_DMA_INSTANCE, \
|
||||
.request = UART4_RX_DMA_REQUEST, \
|
||||
.dma_rcc = UART4_RX_DMA_RCC, \
|
||||
.dma_irq = UART4_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART4_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART4_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_USING_UART5)
|
||||
#ifndef UART5_CONFIG
|
||||
#if defined(STM32G0B1xx) || defined(STM32G0C1xx)
|
||||
#define UART5_CONFIG \
|
||||
{ \
|
||||
.name = "uart5", \
|
||||
.Instance = UART5, \
|
||||
.irq_type = USART3_4_5_6_LPUART1_IRQn, \
|
||||
}
|
||||
#elif defined(STM32G0B0xx)
|
||||
#define UART5_CONFIG \
|
||||
{ \
|
||||
.name = "uart5", \
|
||||
.Instance = UART5, \
|
||||
.irq_type = USART3_4_5_6_IRQn, \
|
||||
}
|
||||
#else
|
||||
#define UART5_CONFIG \
|
||||
{ \
|
||||
.name = "uart5", \
|
||||
.Instance = UART5, \
|
||||
.irq_type = UART5_IRQn, \
|
||||
}
|
||||
#endif /* defined(STM32G0B1xx) || defined(STM32G0C1xx) */
|
||||
#endif /* UART5_CONFIG */
|
||||
#endif /* BSP_USING_UART5 */
|
||||
|
||||
#if defined(BSP_UART5_RX_USING_DMA)
|
||||
#ifndef UART5_DMA_RX_CONFIG
|
||||
#define UART5_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = DMA_NOT_AVAILABLE, \
|
||||
}
|
||||
#endif /* UART5_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART5_RX_USING_DMA */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __UART_CONFIG_H__ */
|
||||
Reference in New Issue
Block a user