From 12dbf59150ae200f044084777d8f0aa418c963a3 Mon Sep 17 00:00:00 2001 From: a1012112796 <1012112796@qq.com> Date: Wed, 24 Jan 2024 13:55:07 +0800 Subject: [PATCH] =?UTF-8?q?pwm=20=E9=A9=B1=E5=8A=A8=E4=BC=98=E5=8C=96?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 实测发现, 改为低电平作为有效电平后，输出脉宽更准确一些， 故作此修改。另外移除了一段无效代码逻辑，降低理解负担。 Signed-off-by: a1012112796 <1012112796@qq.com> --- libraries/HAL_Drivers/drv_pwm.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/libraries/HAL_Drivers/drv_pwm.c b/libraries/HAL_Drivers/drv_pwm.c index 6543ced..a0e7b63 100644 --- a/libraries/HAL_Drivers/drv_pwm.c +++ b/libraries/HAL_Drivers/drv_pwm.c @@ -264,14 +264,6 @@ static rt_err_t drv_pwm_get(TIM_HandleTypeDef *htim, struct rt_pwm_configuration rt_uint64_t tim_clock; tim_clock = tim_clock_get(htim); - if (__HAL_TIM_GET_CLOCKDIVISION(htim) == TIM_CLOCKDIVISION_DIV2) - { - tim_clock = tim_clock / 2; - } - else if (__HAL_TIM_GET_CLOCKDIVISION(htim) == TIM_CLOCKDIVISION_DIV4) - { - tim_clock = tim_clock / 4; - } /* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */ tim_clock /= 1000000UL; @@ -357,6 +349,7 @@ static rt_err_t drv_pwm_set_pulse(TIM_HandleTypeDef *htim, struct rt_pwm_configu tim_clock /= 1000000UL; period = (__HAL_TIM_GET_AUTORELOAD(htim) + 1) * (htim->Instance->PSC + 1) * 1000UL / tim_clock; + configuration->pulse = period - configuration->pulse; // 改为低电平有效，故需要计算一下低电平的脉宽 pulse = (rt_uint64_t)configuration->pulse * (__HAL_TIM_GET_AUTORELOAD(htim) + 1) / period; if (pulse < MIN_PULSE) @@ -452,7 +445,7 @@ static rt_err_t stm32_hw_pwm_init(struct stm32_pwm *device) oc_config.OCMode = TIM_OCMODE_PWM1; oc_config.Pulse = 0; - oc_config.OCPolarity = TIM_OCPOLARITY_HIGH; + oc_config.OCPolarity = TIM_OCPOLARITY_LOW; oc_config.OCFastMode = TIM_OCFAST_DISABLE; oc_config.OCNIdleState = TIM_OCNIDLESTATE_RESET; oc_config.OCIdleState = TIM_OCIDLESTATE_RESET;