From 130297f5ecbb8eb9e2b6dfc4e4eeea38cbd285b4 Mon Sep 17 00:00:00 2001 From: a1012112796 <1012112796@qq.com> Date: Thu, 30 Nov 2023 17:17:08 +0800 Subject: [PATCH] =?UTF-8?q?=E6=A0=B8=E7=AE=97can=20=E6=B3=A2=E7=89=B9?= =?UTF-8?q?=E7=8E=87?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: a1012112796 <1012112796@qq.com> --- libraries/HAL_Drivers/drv_can.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/libraries/HAL_Drivers/drv_can.c b/libraries/HAL_Drivers/drv_can.c index 04d9c5d..1f10541 100644 --- a/libraries/HAL_Drivers/drv_can.c +++ b/libraries/HAL_Drivers/drv_can.c @@ -51,7 +51,7 @@ static const struct stm32_baud_rate_tab can_baud_rate_tab[] = {CAN20kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 150)}, {CAN10kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 300)} }; -#else /* APB1 45MHz(max) */ +#else /* APB1 50MHz(max) */ static const struct stm32_baud_rate_tab can_baud_rate_tab[] = { #ifdef BSP_USING_CAN168M @@ -59,14 +59,14 @@ static const struct stm32_baud_rate_tab can_baud_rate_tab[] = #else {CAN1MBaud, (CAN_SJW_2TQ | CAN_BS1_6TQ | CAN_BS2_3TQ | 5)}, #endif - {CAN800kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_5TQ | 4)}, - {CAN500kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 6)}, - {CAN250kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 12)}, - {CAN125kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 24)}, - {CAN100kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 30)}, - {CAN50kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 60)}, - {CAN20kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 150)}, - {CAN10kBaud, (CAN_SJW_2TQ | CAN_BS1_9TQ | CAN_BS2_5TQ | 300)} + // {CAN800kBaud, (CAN_SJW_2TQ | CAN_BS1_8TQ | CAN_BS2_5TQ | 4)}, + {CAN500kBaud, (CAN_SJW_2TQ | CAN_BS1_1TQ | CAN_BS2_3TQ | 2)}, + {CAN250kBaud, (CAN_SJW_2TQ | CAN_BS1_1TQ | CAN_BS2_3TQ | 4)}, + {CAN125kBaud, (CAN_SJW_2TQ | CAN_BS1_4TQ | CAN_BS2_3TQ | 50)}, + {CAN100kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_6TQ | 50)}, + {CAN50kBaud, (CAN_SJW_2TQ | CAN_BS1_1TQ | CAN_BS2_3TQ | 200)}, + {CAN20kBaud, (CAN_SJW_2TQ | CAN_BS1_3TQ | CAN_BS2_6TQ | 250)}, + {CAN10kBaud, (CAN_SJW_2TQ | CAN_BS1_12TQ | CAN_BS2_7TQ | 250)} }; #endif #elif defined (SOC_SERIES_STM32F7)/* APB1 54MHz(max) */