@@ -37,50 +37,50 @@
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*/
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#define HAL_MODULE_ENABLED
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#define HAL_ADC_MODULE_ENABLED
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/* #define HAL_CRYP_MODULE_ENABLED */
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/* #define HAL_CRYP_MODULE_ENABLED */
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#define HAL_ADC_MODULE_ENABLED
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#define HAL_CAN_MODULE_ENABLED
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/* #define HAL_CRC_MODULE_ENABLED */
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/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
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/* #define HAL_CRYP_MODULE_ENABLED */
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/* #define HAL_DAC_MODULE_ENABLED */
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/* #define HAL_DCMI_MODULE_ENABLED */
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/* #define HAL_DMA2D_MODULE_ENABLED */
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/* #define HAL_ETH_MODULE_ENABLED */
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/* #define HAL_NAND_MODULE_ENABLED */
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/* #define HAL_NOR_MODULE_ENABLED */
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/* #define HAL_PCCARD_MODULE_ENABLED */
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/* #define HAL_SRAM_MODULE_ENABLED */
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/* #define HAL_SDRAM_MODULE_ENABLED */
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/* #define HAL_HASH_MODULE_ENABLED */
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/* #define HAL_CRC_MODULE_ENABLED */
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/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
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/* #define HAL_DAC_MODULE_ENABLED */
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/* #define HAL_DCMI_MODULE_ENABLED */
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/* #define HAL_DMA2D_MODULE_ENABLED */
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/* #define HAL_ETH_MODULE_ENABLED */
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/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
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/* #define HAL_NAND_MODULE_ENABLED */
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/* #define HAL_NOR_MODULE_ENABLED */
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/* #define HAL_PCCARD_MODULE_ENABLED */
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/* #define HAL_SRAM_MODULE_ENABLED */
|
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/* #define HAL_SDRAM_MODULE_ENABLED */
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/* #define HAL_HASH_MODULE_ENABLED */
|
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#define HAL_I2C_MODULE_ENABLED
|
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/* #define HAL_I2S_MODULE_ENABLED */
|
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/* #define HAL_IWDG_MODULE_ENABLED */
|
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/* #define HAL_LTDC_MODULE_ENABLED */
|
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/* #define HAL_RNG_MODULE_ENABLED */
|
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/* #define HAL_RTC_MODULE_ENABLED */
|
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/* #define HAL_SAI_MODULE_ENABLED */
|
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/* #define HAL_SD_MODULE_ENABLED */
|
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/* #define HAL_MMC_MODULE_ENABLED */
|
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/* #define HAL_I2S_MODULE_ENABLED */
|
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#define HAL_IWDG_MODULE_ENABLED
|
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/* #define HAL_LTDC_MODULE_ENABLED */
|
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/* #define HAL_RNG_MODULE_ENABLED */
|
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/* #define HAL_RTC_MODULE_ENABLED */
|
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/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
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#define HAL_SPI_MODULE_ENABLED
|
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#define HAL_TIM_MODULE_ENABLED
|
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#define HAL_UART_MODULE_ENABLED
|
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/* #define HAL_USART_MODULE_ENABLED */
|
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/* #define HAL_IRDA_MODULE_ENABLED */
|
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
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/* #define HAL_SMBUS_MODULE_ENABLED */
|
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/* #define HAL_WWDG_MODULE_ENABLED */
|
||||
/* #define HAL_PCD_MODULE_ENABLED */
|
||||
/* #define HAL_HCD_MODULE_ENABLED */
|
||||
/* #define HAL_DSI_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_CEC_MODULE_ENABLED */
|
||||
/* #define HAL_FMPI2C_MODULE_ENABLED */
|
||||
/* #define HAL_FMPSMBUS_MODULE_ENABLED */
|
||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
/* #define HAL_USART_MODULE_ENABLED */
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||
/* #define HAL_PCD_MODULE_ENABLED */
|
||||
/* #define HAL_HCD_MODULE_ENABLED */
|
||||
/* #define HAL_DSI_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_CEC_MODULE_ENABLED */
|
||||
/* #define HAL_FMPI2C_MODULE_ENABLED */
|
||||
/* #define HAL_FMPSMBUS_MODULE_ENABLED */
|
||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
@@ -214,7 +214,7 @@
|
||||
#define MAC_ADDR5 0U
|
||||
|
||||
/* Definition of the Ethernet driver buffers size and count */
|
||||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||
#define ETH_RX_BUF_SIZE /* buffer size for receive */
|
||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
@@ -222,7 +222,7 @@
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848_PHY_ADDRESS Address*/
|
||||
#define DP83848_PHY_ADDRESS 0x01U
|
||||
#define DP83848_PHY_ADDRESS
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY 0x000000FFU
|
||||
/* PHY Configuration delay */
|
||||
@@ -252,10 +252,10 @@
|
||||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
|
||||
|
||||
/* Section 4: Extended PHY Registers */
|
||||
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
|
||||
#define PHY_SR ((uint16_t)) /*!< PHY status register Offset */
|
||||
|
||||
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||
#define PHY_SPEED_STATUS ((uint16_t)) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)) /*!< PHY Duplex mask */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
@@ -327,6 +327,10 @@
|
||||
#include "stm32f4xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_eth_legacy.h"
|
||||
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
Reference in New Issue
Block a user