a1012112796/test_rtt_413
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can & uart 串口驱动初步完善

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Signed-off-by: a1012112796 <1012112796@qq.com>
This commit is contained in:
a1012112796
2022-12-16 16:59:20 +08:00
parent 1e55f52bd0
commit e9b743dbb8
11 changed files with 888 additions and 298 deletions
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29
.config
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@@ -715,14 +715,39 @@ CONFIG_SOC_STM32F413VG=y
CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART1=y CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_UART1_RX_USING_DMA is not set CONFIG_BSP_UART1_RX_USING_DMA=y
CONFIG_BSP_UART1_TX_USING_DMA=y
CONFIG_BSP_USING_UART2=y CONFIG_BSP_USING_UART2=y
CONFIG_BSP_UART2_RX_USING_DMA=y CONFIG_BSP_UART2_RX_USING_DMA=y
CONFIG_BSP_UART2_TX_USING_DMA=y CONFIG_BSP_UART2_TX_USING_DMA=y
# CONFIG_BSP_USING_UART3 is not set CONFIG_BSP_USING_UART3=y
CONFIG_BSP_UART3_RX_USING_DMA=y
CONFIG_BSP_UART3_TX_USING_DMA=y
CONFIG_BSP_USING_UART4=y
CONFIG_BSP_UART4_RX_USING_DMA=y
CONFIG_BSP_UART4_TX_USING_DMA=y
CONFIG_BSP_USING_UART5=y
CONFIG_BSP_UART5_RX_USING_DMA=y
CONFIG_BSP_UART5_TX_USING_DMA=y
CONFIG_BSP_USING_UART6=y
CONFIG_BSP_UART6_RX_USING_DMA=y
CONFIG_BSP_UART6_TX_USING_DMA=y
CONFIG_BSP_USING_UART7=y
# CONFIG_BSP_UART7_RX_USING_DMA is not set
# CONFIG_BSP_UART7_TX_USING_DMA is not set
CONFIG_BSP_USING_UART8=y
# CONFIG_BSP_UART8_RX_USING_DMA is not set
# CONFIG_BSP_UART8_TX_USING_DMA is not set
CONFIG_BSP_USING_UART9=y
# CONFIG_BSP_UART9_RX_USING_DMA is not set
CONFIG_BSP_UART9_TX_USING_DMA=y
CONFIG_BSP_USING_UART10=y
CONFIG_BSP_UART10_RX_USING_DMA=y
CONFIG_BSP_UART10_TX_USING_DMA=y
CONFIG_BSP_USING_CAN=y CONFIG_BSP_USING_CAN=y
CONFIG_BSP_USING_CAN1=y CONFIG_BSP_USING_CAN1=y
CONFIG_BSP_USING_CAN2=y CONFIG_BSP_USING_CAN2=y
CONFIG_BSP_USING_CAN3=y
# CONFIG_BSP_USING_SPI is not set # CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_I2C1 is not set # CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_TIM is not set # CONFIG_BSP_USING_TIM is not set

106
board/Kconfig
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@@ -36,6 +36,11 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
default n default n
config BSP_UART1_TX_USING_DMA
bool "Enable UART1 TX DMA"
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART2 config BSP_USING_UART2
bool "Enable UART2" bool "Enable UART2"
default y default y
@@ -56,6 +61,102 @@ menu "On-chip Peripheral Drivers"
bool "Enable UART3 RX DMA" bool "Enable UART3 RX DMA"
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
default n default n
config BSP_UART3_TX_USING_DMA
bool "Enable UART3 TX DMA"
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART4
bool "Enable UART4"
default y
config BSP_UART4_RX_USING_DMA
bool "Enable UART4 RX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_UART4_TX_USING_DMA
bool "Enable UART4 TX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART5
bool "Enable UART5"
default y
config BSP_UART5_RX_USING_DMA
bool "Enable UART5 RX DMA"
depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA
default n
config BSP_UART5_TX_USING_DMA
bool "Enable UART5 TX DMA"
depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART6
bool "Enable UART6"
default y
config BSP_UART6_RX_USING_DMA
bool "Enable UART6 RX DMA"
depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA
default n
config BSP_UART6_TX_USING_DMA
bool "Enable UART6 TX DMA"
depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART7
bool "Enable UART7"
default y
config BSP_UART7_RX_USING_DMA
bool "Enable UART7 RX DMA"
depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA
default n
config BSP_UART7_TX_USING_DMA
bool "Enable UART7 TX DMA"
depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART8
bool "Enable UART8"
default y
config BSP_UART8_RX_USING_DMA
bool "Enable UART8 RX DMA"
depends on BSP_USING_UART8 && RT_SERIAL_USING_DMA
default n
config BSP_UART8_TX_USING_DMA
bool "Enable UART8 TX DMA"
depends on BSP_USING_UART8 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART9
bool "Enable UART9"
default y
config BSP_UART9_RX_USING_DMA
bool "Enable UART9 RX DMA"
depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA
default n
config BSP_UART9_TX_USING_DMA
bool "Enable UART9 TX DMA"
depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART10
bool "Enable UART10"
default y
config BSP_UART10_RX_USING_DMA
bool "Enable UART10 RX DMA"
depends on BSP_USING_UART10 && RT_SERIAL_USING_DMA
default n
config BSP_UART10_TX_USING_DMA
bool "Enable UART10 TX DMA"
depends on BSP_USING_UART10 && RT_SERIAL_USING_DMA
default n
endif endif
menuconfig BSP_USING_CAN menuconfig BSP_USING_CAN
@@ -69,8 +170,11 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_CAN2 config BSP_USING_CAN2
bool "using CAN2" bool "using CAN2"
default n default n
config BSP_USING_CAN3
bool "using CAN3"
default n
endif endif
menuconfig BSP_USING_SPI menuconfig BSP_USING_SPI
bool "Enable SPI BUS" bool "Enable SPI BUS"
default n default n

72
libraries/HAL_Drivers/config/f4/dma_config.h
View File

@@ -151,18 +151,30 @@ extern "C" {
#endif #endif
/* DMA2 stream0 */ /* DMA2 stream0 */
#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE) #if defined(BSP_UART9_TX_USING_DMA) && !defined(UART9_TX_DMA_INSTANCE)
#define UART9_DMA_TX_IRQHandler DMA2_Stream0_IRQHandler
#define UART9_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART9_TX_DMA_INSTANCE DMA2_Stream0
#define UART9_TX_DMA_CHANNEL DMA_CHANNEL_1
#define UART9_TX_DMA_IRQ DMA2_Stream0_IRQn
#elif defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
#define SPI1_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler #define SPI1_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler
#define SPI1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN #define SPI1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define SPI1_RX_DMA_INSTANCE DMA2_Stream0 #define SPI1_RX_DMA_INSTANCE DMA2_Stream0
#define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3 #define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3
#define SPI1_RX_DMA_IRQ DMA2_Stream0_IRQn #define SPI1_RX_DMA_IRQ DMA2_Stream0_IRQn
#elif defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_INSTANCE) #elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE)
#define SPI4_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler #define SPI4_DMA_TX_IRQHandler DMA2_Stream0_IRQHandler
#define SPI4_RX_DMA_RCC RCC_AHB1ENR_DMA2EN #define SPI4_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define SPI4_RX_DMA_INSTANCE DMA2_Stream0 #define SPI4_TX_DMA_INSTANCE DMA2_Stream0
#define SPI4_RX_DMA_CHANNEL DMA_CHANNEL_4 #define SPI4_TX_DMA_CHANNEL DMA_CHANNEL_4
#define SPI4_RX_DMA_IRQ DMA2_Stream0_IRQn #define SPI4_TX_DMA_IRQ DMA2_Stream0_IRQn
#elif defined(BSP_UART10_RX_USING_DMA) && !defined(UART10_RX_DMA_INSTANCE)
#define UART10_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler
#define UART10_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART10_RX_DMA_INSTANCE DMA2_Stream0
#define UART10_RX_DMA_CHANNEL DMA_CHANNEL_5
#define UART10_RX_DMA_IRQ DMA2_Stream0_IRQn
#endif #endif
/* DMA2 stream1 */ /* DMA2 stream1 */
@@ -208,12 +220,18 @@ extern "C" {
#define SPI1_TX_DMA_INSTANCE DMA2_Stream3 #define SPI1_TX_DMA_INSTANCE DMA2_Stream3
#define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3 #define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3
#define SPI1_TX_DMA_IRQ DMA2_Stream3_IRQn #define SPI1_TX_DMA_IRQ DMA2_Stream3_IRQn
#elif defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_INSTANCE) #elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE)
#define SPI4_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler #define SPI4_DMA_TX_IRQHandler DMA2_Stream3_IRQHandler
#define SPI4_RX_DMA_RCC RCC_AHB1ENR_DMA2EN #define SPI4_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define SPI4_RX_DMA_INSTANCE DMA2_Stream3 #define SPI4_TX_DMA_INSTANCE DMA2_Stream3
#define SPI4_RX_DMA_CHANNEL DMA_CHANNEL_5 #define SPI4_TX_DMA_CHANNEL DMA_CHANNEL_5
#define SPI4_RX_DMA_IRQ DMA2_Stream3_IRQn #define SPI4_TX_DMA_IRQ DMA2_Stream3_IRQn
#elif defined(BSP_UART10_RX_USING_DMA) && !defined(UART10_RX_DMA_INSTANCE)
#define UART10_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler
#define UART10_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART10_RX_DMA_INSTANCE DMA2_Stream3
#define UART10_RX_DMA_CHANNEL DMA_CHANNEL_9
#define UART10_RX_DMA_IRQ DMA2_Stream3_IRQn
#endif #endif
/* DMA2 stream4 */ /* DMA2 stream4 */
@@ -250,6 +268,12 @@ extern "C" {
#define SPI5_RX_DMA_INSTANCE DMA2_Stream5 #define SPI5_RX_DMA_INSTANCE DMA2_Stream5
#define SPI5_RX_DMA_CHANNEL DMA_CHANNEL_7 #define SPI5_RX_DMA_CHANNEL DMA_CHANNEL_7
#define SPI5_RX_DMA_IRQ DMA2_Stream5_IRQn #define SPI5_RX_DMA_IRQ DMA2_Stream5_IRQn
#elif defined(BSP_UART10_TX_USING_DMA) && !defined(UART10_TX_DMA_INSTANCE)
#define UART10_DMA_TX_IRQHandler DMA2_Stream5_IRQHandler
#define UART10_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART10_TX_DMA_INSTANCE DMA2_Stream5
#define UART10_TX_DMA_CHANNEL DMA_CHANNEL_9
#define UART10_TX_DMA_IRQ DMA2_Stream5_IRQn
#endif #endif
/* DMA2 stream6 */ /* DMA2 stream6 */
@@ -259,7 +283,7 @@ extern "C" {
#define SPI5_TX_DMA_INSTANCE DMA2_Stream6 #define SPI5_TX_DMA_INSTANCE DMA2_Stream6
#define SPI5_TX_DMA_CHANNEL DMA_CHANNEL_7 #define SPI5_TX_DMA_CHANNEL DMA_CHANNEL_7
#define SPI5_TX_DMA_IRQ DMA2_Stream6_IRQn #define SPI5_TX_DMA_IRQ DMA2_Stream6_IRQn
#elif defined(BSP_UART6_TX_USING_DMA) && !defined(BSP_USING_SDIO) && !defined(UART6_TX_DMA_INSTANCE) #elif defined(BSP_UART6_TX_USING_DMA) && !defined(UART6_TX_DMA_INSTANCE)
#define UART6_DMA_TX_IRQHandler DMA2_Stream6_IRQHandler #define UART6_DMA_TX_IRQHandler DMA2_Stream6_IRQHandler
#define UART6_TX_DMA_RCC RCC_AHB1ENR_DMA2EN #define UART6_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART6_TX_DMA_INSTANCE DMA2_Stream6 #define UART6_TX_DMA_INSTANCE DMA2_Stream6
@@ -268,18 +292,24 @@ extern "C" {
#endif #endif
/* DMA2 stream7 */ /* DMA2 stream7 */
#if defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE) #if defined(BSP_UART9_RX_USING_DMA) && !defined(UART9_RX_DMA_INSTANCE)
#define UART9_DMA_RX_IRQHandler DMA2_Stream7_IRQHandler
#define UART9_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART9_RX_DMA_INSTANCE DMA2_Stream7
#define UART9_RX_DMA_CHANNEL DMA_CHANNEL_0
#define UART9_RX_DMA_IRQ DMA2_Stream7_IRQn
#elif defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE)
#define UART1_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler #define UART1_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler
#define UART1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN #define UART1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART1_TX_DMA_INSTANCE DMA2_Stream7 #define UART1_TX_DMA_INSTANCE DMA2_Stream7
#define UART1_TX_DMA_CHANNEL DMA_CHANNEL_4 #define UART1_TX_DMA_CHANNEL DMA_CHANNEL_4
#define UART1_TX_DMA_IRQ DMA2_Stream7_IRQn #define UART1_TX_DMA_IRQ DMA2_Stream7_IRQn
#elif defined(BSP_UART6_TX_USING_DMA) && !defined(UART6_TX_DMA_INSTANCE) #elif defined(BSP_UART10_TX_USING_DMA) && !defined(UART10_TX_DMA_INSTANCE)
#define UART6_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler #define UART10_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler
#define UART6_TX_DMA_RCC RCC_AHB1ENR_DMA2EN #define UART10_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART6_TX_DMA_INSTANCE DMA2_Stream7 #define UART10_TX_DMA_INSTANCE DMA2_Stream7
#define UART6_TX_DMA_CHANNEL DMA_CHANNEL_5 #define UART10_TX_DMA_CHANNEL DMA_CHANNEL_6
#define UART6_TX_DMA_IRQ DMA2_Stream7_IRQn #define UART10_TX_DMA_IRQ DMA2_Stream7_IRQn
#endif #endif
#ifdef __cplusplus #ifdef __cplusplus

70
libraries/HAL_Drivers/config/f4/uart_config.h
View File

@@ -298,6 +298,76 @@ extern "C" {
#endif /* BSP_UART8_TX_USING_DMA */ #endif /* BSP_UART8_TX_USING_DMA */
#endif /* BSP_USING_UART8 */ #endif /* BSP_USING_UART8 */
#if defined(BSP_USING_UART9)
#ifndef UART9_CONFIG
#define UART9_CONFIG \
{ \
.name = "uart9", \
.Instance = UART9, \
.irq_type = UART9_IRQn, \
}
#endif /* UART8_CONFIG */
#if defined(BSP_UART9_RX_USING_DMA)
#ifndef UART9_DMA_RX_CONFIG
#define UART9_DMA_RX_CONFIG \
{ \
.Instance = UART8_RX_DMA_INSTANCE, \
.channel = UART8_RX_DMA_CHANNEL, \
.dma_rcc = UART8_RX_DMA_RCC, \
.dma_irq = UART8_RX_DMA_IRQ, \
}
#endif /* UART9_DMA_RX_CONFIG */
#endif /* BSP_UART9_RX_USING_DMA */
#if defined(BSP_UART9_TX_USING_DMA)
#ifndef UART9_DMA_TX_CONFIG
#define UART9_DMA_TX_CONFIG \
{ \
.Instance = UART9_TX_DMA_INSTANCE, \
.channel = UART9_TX_DMA_CHANNEL, \
.dma_rcc = UART9_TX_DMA_RCC, \
.dma_irq = UART9_TX_DMA_IRQ, \
}
#endif /* UART9_DMA_TX_CONFIG */
#endif /* BSP_UART9_TX_USING_DMA */
#endif /* BSP_USING_UART9 */
#if defined(BSP_USING_UART10)
#ifndef UART10_CONFIG
#define UART10_CONFIG \
{ \
.name = "uart10", \
.Instance = UART10, \
.irq_type = UART10_IRQn, \
}
#endif /* UART8_CONFIG */
#if defined(BSP_UART10_RX_USING_DMA)
#ifndef UART10_DMA_RX_CONFIG
#define UART10_DMA_RX_CONFIG \
{ \
.Instance = UART10_RX_DMA_INSTANCE, \
.channel = UART10_RX_DMA_CHANNEL, \
.dma_rcc = UART10_RX_DMA_RCC, \
.dma_irq = UART10_RX_DMA_IRQ, \
}
#endif /* UART10_DMA_RX_CONFIG */
#endif /* BSP_UART10_RX_USING_DMA */
#if defined(BSP_UART10_TX_USING_DMA)
#ifndef UART10_DMA_TX_CONFIG
#define UART10_DMA_TX_CONFIG \
{ \
.Instance = UART10_TX_DMA_INSTANCE, \
.channel = UART10_TX_DMA_CHANNEL, \
.dma_rcc = UART10_TX_DMA_RCC, \
.dma_irq = UART10_TX_DMA_IRQ, \
}
#endif /* UART10_DMA_TX_CONFIG */
#endif /* BSP_UART10_TX_USING_DMA */
#endif /* BSP_USING_UART10 */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

188
libraries/HAL_Drivers/drv_can.c
View File

@@ -113,6 +113,14 @@ static struct stm32_can drv_can2 =
}; };
#endif #endif
#ifdef BSP_USING_CAN3
static struct stm32_can drv_can3 =
{
"can3",
.CanHandle.Instance = CAN3,
};
#endif
static rt_uint32_t get_can_baud_index(rt_uint32_t baud) static rt_uint32_t get_can_baud_index(rt_uint32_t baud)
{ {
rt_uint32_t len, index; rt_uint32_t len, index;
@@ -206,6 +214,13 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn); HAL_NVIC_DisableIRQ(CAN2_RX0_IRQn);
HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn); HAL_NVIC_DisableIRQ(CAN2_RX1_IRQn);
} }
#endif
#ifdef CAN3
if (CAN3 == drv_can->CanHandle.Instance)
{
HAL_NVIC_DisableIRQ(CAN3_RX0_IRQn);
HAL_NVIC_DisableIRQ(CAN3_RX1_IRQn);
}
#endif #endif
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_RX_FIFO0_MSG_PENDING); __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_RX_FIFO0_MSG_PENDING);
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_RX_FIFO0_FULL); __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_RX_FIFO0_FULL);
@@ -225,6 +240,12 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
{ {
HAL_NVIC_DisableIRQ(CAN2_TX_IRQn); HAL_NVIC_DisableIRQ(CAN2_TX_IRQn);
} }
#endif
#ifdef CAN3
if (CAN3 == drv_can->CanHandle.Instance)
{
HAL_NVIC_DisableIRQ(CAN3_TX_IRQn);
}
#endif #endif
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_TX_MAILBOX_EMPTY); __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_TX_MAILBOX_EMPTY);
} }
@@ -239,6 +260,12 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
{ {
NVIC_DisableIRQ(CAN2_SCE_IRQn); NVIC_DisableIRQ(CAN2_SCE_IRQn);
} }
#endif
#ifdef CAN3
if (CAN3 == drv_can->CanHandle.Instance)
{
NVIC_DisableIRQ(CAN3_SCE_IRQn);
}
#endif #endif
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_ERROR_WARNING); __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_ERROR_WARNING);
__HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_ERROR_PASSIVE); __HAL_CAN_DISABLE_IT(&drv_can->CanHandle, CAN_IT_ERROR_PASSIVE);
@@ -273,6 +300,15 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 1, 0); HAL_NVIC_SetPriority(CAN2_RX1_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn); HAL_NVIC_EnableIRQ(CAN2_RX1_IRQn);
} }
#endif
#ifdef CAN3
if (CAN3 == drv_can->CanHandle.Instance)
{
HAL_NVIC_SetPriority(CAN3_RX0_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(CAN3_RX0_IRQn);
HAL_NVIC_SetPriority(CAN3_RX1_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(CAN3_RX1_IRQn);
}
#endif #endif
} }
else if (argval == RT_DEVICE_FLAG_INT_TX) else if (argval == RT_DEVICE_FLAG_INT_TX)
@@ -290,6 +326,13 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
HAL_NVIC_SetPriority(CAN2_TX_IRQn, 1, 0); HAL_NVIC_SetPriority(CAN2_TX_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(CAN2_TX_IRQn); HAL_NVIC_EnableIRQ(CAN2_TX_IRQn);
} }
#endif
#ifdef CAN3
if (CAN3 == drv_can->CanHandle.Instance)
{
HAL_NVIC_SetPriority(CAN3_TX_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(CAN3_TX_IRQn);
}
#endif #endif
} }
else if (argval == RT_DEVICE_CAN_INT_ERR) else if (argval == RT_DEVICE_CAN_INT_ERR)
@@ -311,6 +354,13 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
HAL_NVIC_SetPriority(CAN2_SCE_IRQn, 1, 0); HAL_NVIC_SetPriority(CAN2_SCE_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(CAN2_SCE_IRQn); HAL_NVIC_EnableIRQ(CAN2_SCE_IRQn);
} }
#endif
#ifdef CAN3
if (CAN3 == drv_can->CanHandle.Instance)
{
HAL_NVIC_SetPriority(CAN3_SCE_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(CAN3_SCE_IRQn);
}
#endif #endif
} }
break; break;
@@ -623,6 +673,12 @@ static int _can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t fifo)
pmsg->hdr = (rxheader.FilterMatchIndex >> 1) + 14; pmsg->hdr = (rxheader.FilterMatchIndex >> 1) + 14;
} }
#endif #endif
#ifdef CAN3
else if (hcan->Instance == CAN3)
{
pmsg->hdr = (rxheader.FilterMatchIndex + 1) >> 1;
}
#endif
return RT_EOK; return RT_EOK;
} }
@@ -937,6 +993,126 @@ void CAN2_SCE_IRQHandler(void)
} }
#endif /* BSP_USING_CAN2 */ #endif /* BSP_USING_CAN2 */
#ifdef BSP_USING_CAN3
/**
* @brief This function handles CAN3 TX interrupts. transmit fifo0/1/2 is empty can trigger this interrupt
*/
void CAN3_TX_IRQHandler(void)
{
rt_interrupt_enter();
CAN_HandleTypeDef *hcan;
hcan = &drv_can3.CanHandle;
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP0))
{
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK0))
{
rt_hw_can_isr(&drv_can3.device, RT_CAN_EVENT_TX_DONE | 0 << 8);
}
else
{
rt_hw_can_isr(&drv_can3.device, RT_CAN_EVENT_TX_FAIL | 0 << 8);
}
/* Write 0 to Clear transmission status flag RQCPx */
SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP0);
}
else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP1))
{
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1))
{
rt_hw_can_isr(&drv_can3.device, RT_CAN_EVENT_TX_DONE | 1 << 8);
}
else
{
rt_hw_can_isr(&drv_can3.device, RT_CAN_EVENT_TX_FAIL | 1 << 8);
}
/* Write 0 to Clear transmission status flag RQCPx */
SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP1);
}
else if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_RQCP2))
{
if (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK2))
{
rt_hw_can_isr(&drv_can3.device, RT_CAN_EVENT_TX_DONE | 2 << 8);
}
else
{
rt_hw_can_isr(&drv_can3.device, RT_CAN_EVENT_TX_FAIL | 2 << 8);
}
/* Write 0 to Clear transmission status flag RQCPx */
SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP2);
}
rt_interrupt_leave();
}
/**
* @brief This function handles CAN3 RX0 interrupts.
*/
void CAN3_RX0_IRQHandler(void)
{
rt_interrupt_enter();
_can_rx_isr(&drv_can3.device, CAN_RX_FIFO0);
rt_interrupt_leave();
}
/**
* @brief This function handles CAN3 RX1 interrupts.
*/
void CAN3_RX1_IRQHandler(void)
{
rt_interrupt_enter();
_can_rx_isr(&drv_can3.device, CAN_RX_FIFO1);
rt_interrupt_leave();
}
/**
* @brief This function handles CAN3 SCE interrupts.
*/
void CAN3_SCE_IRQHandler(void)
{
rt_uint32_t errtype;
CAN_HandleTypeDef *hcan;
hcan = &drv_can3.CanHandle;
errtype = hcan->Instance->ESR;
rt_interrupt_enter();
HAL_CAN_IRQHandler(hcan);
switch ((errtype & 0x70) >> 4)
{
case RT_CAN_BUS_BIT_PAD_ERR:
drv_can3.device.status.bitpaderrcnt++;
break;
case RT_CAN_BUS_FORMAT_ERR:
drv_can3.device.status.formaterrcnt++;
break;
case RT_CAN_BUS_ACK_ERR:/* attention !!! test ack err's unit is transmit unit */
drv_can3.device.status.ackerrcnt++;
if (!READ_BIT(drv_can3.CanHandle.Instance->TSR, CAN_FLAG_TXOK0))
rt_hw_can_isr(&drv_can3.device, RT_CAN_EVENT_TX_FAIL | 0 << 8);
else if (!READ_BIT(drv_can3.CanHandle.Instance->TSR, CAN_FLAG_TXOK0))
rt_hw_can_isr(&drv_can3.device, RT_CAN_EVENT_TX_FAIL | 1 << 8);
else if (!READ_BIT(drv_can3.CanHandle.Instance->TSR, CAN_FLAG_TXOK0))
rt_hw_can_isr(&drv_can3.device, RT_CAN_EVENT_TX_FAIL | 2 << 8);
break;
case RT_CAN_BUS_IMPLICIT_BIT_ERR:
case RT_CAN_BUS_EXPLICIT_BIT_ERR:
drv_can3.device.status.biterrcnt++;
break;
case RT_CAN_BUS_CRC_ERR:
drv_can3.device.status.crcerrcnt++;
break;
}
drv_can3.device.status.lasterrtype = errtype & 0x70;
drv_can3.device.status.rcverrcnt = errtype >> 24;
drv_can3.device.status.snderrcnt = (errtype >> 16 & 0xFF);
drv_can3.device.status.errcode = errtype & 0x07;
hcan->Instance->MSR |= CAN_MSR_ERRI;
rt_interrupt_leave();
}
#endif /* BSP_USING_CAN3 */
/** /**
* @brief Error CAN callback. * @brief Error CAN callback.
* @param hcan pointer to a CAN_HandleTypeDef structure that contains * @param hcan pointer to a CAN_HandleTypeDef structure that contains
@@ -1007,6 +1183,18 @@ int rt_hw_can_init(void)
&drv_can2); &drv_can2);
#endif /* BSP_USING_CAN2 */ #endif /* BSP_USING_CAN2 */
#ifdef BSP_USING_CAN3
filterConf.FilterBank = 0;
drv_can3.FilterConfig = filterConf;
drv_can3.device.config = config;
/* register CAN3 device */
rt_hw_can_register(&drv_can3.device,
drv_can3.name,
&_can_ops,
&drv_can3);
#endif /* BSP_USING_CAN3 */
return 0; return 0;
} }

120
libraries/HAL_Drivers/drv_usart.c
View File

@@ -25,7 +25,8 @@
#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && \ #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && \
!defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_UART6) && \ !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_UART6) && \
!defined(BSP_USING_UART7) && !defined(BSP_USING_UART8) && !defined(BSP_USING_LPUART1) !defined(BSP_USING_UART7) && !defined(BSP_USING_UART8) && !defined(BSP_USING_UART9) && \
!defined(BSP_USING_UART10) && !defined(BSP_USING_LPUART1)
#error "Please define at least one BSP_USING_UARTx" #error "Please define at least one BSP_USING_UARTx"
/* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */ /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
#endif #endif
@@ -60,6 +61,12 @@ enum
#ifdef BSP_USING_UART8 #ifdef BSP_USING_UART8
UART8_INDEX, UART8_INDEX,
#endif #endif
#ifdef BSP_USING_UART9
UART9_INDEX,
#endif
#ifdef BSP_USING_UART10
UART10_INDEX,
#endif
#ifdef BSP_USING_LPUART1 #ifdef BSP_USING_LPUART1
LPUART1_INDEX, LPUART1_INDEX,
#endif #endif
@@ -91,6 +98,12 @@ static struct stm32_uart_config uart_config[] =
#ifdef BSP_USING_UART8 #ifdef BSP_USING_UART8
UART8_CONFIG, UART8_CONFIG,
#endif #endif
#ifdef BSP_USING_UART9
UART9_CONFIG,
#endif
#ifdef BSP_USING_UART10
UART10_CONFIG,
#endif
#ifdef BSP_USING_LPUART1 #ifdef BSP_USING_LPUART1
LPUART1_CONFIG, LPUART1_CONFIG,
#endif #endif
@@ -795,6 +808,80 @@ void UART8_DMA_TX_IRQHandler(void)
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA) */ #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA) */
#endif /* BSP_USING_UART8*/ #endif /* BSP_USING_UART8*/
#if defined(BSP_USING_UART9)
void UART9_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
uart_isr(&(uart_obj[UART9_INDEX].serial));
/* leave interrupt */
rt_interrupt_leave();
}
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART9_RX_USING_DMA)
void UART9_DMA_RX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART9_INDEX].dma_rx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART9_RX_USING_DMA) */
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART9_TX_USING_DMA)
void UART9_DMA_TX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART9_INDEX].dma_tx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART9_TX_USING_DMA) */
#endif /* BSP_USING_UART9*/
#if defined(BSP_USING_UART10)
void UART10_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
uart_isr(&(uart_obj[UART10_INDEX].serial));
/* leave interrupt */
rt_interrupt_leave();
}
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART10_RX_USING_DMA)
void UART10_DMA_RX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART10_INDEX].dma_rx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART10_RX_USING_DMA) */
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART10_TX_USING_DMA)
void UART10_DMA_TX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART10_INDEX].dma_tx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART10_TX_USING_DMA) */
#endif /* BSP_USING_UART10*/
#if defined(BSP_USING_LPUART1) #if defined(BSP_USING_LPUART1)
void LPUART1_IRQHandler(void) void LPUART1_IRQHandler(void)
{ {
@@ -820,6 +907,8 @@ void LPUART1_DMA_RX_IRQHandler(void)
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */ #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */
#endif /* BSP_USING_LPUART1*/ #endif /* BSP_USING_LPUART1*/
#ifdef RT_SERIAL_USING_DMA
static void stm32_uart_get_dma_config(void) static void stm32_uart_get_dma_config(void)
{ {
#ifdef BSP_USING_UART1 #ifdef BSP_USING_UART1
@@ -933,9 +1022,36 @@ static void stm32_uart_get_dma_config(void)
uart_config[UART8_INDEX].dma_tx = &uart8_dma_tx; uart_config[UART8_INDEX].dma_tx = &uart8_dma_tx;
#endif #endif
#endif #endif
#ifdef BSP_USING_UART9
uart_obj[UART8_INDEX].uart_dma_flag = 0;
#ifdef BSP_UART9_RX_USING_DMA
uart_obj[UART9_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
static struct dma_config uart9_dma_rx = UART9_DMA_RX_CONFIG;
uart_config[UART9_INDEX].dma_rx = &uart8_dma_rx;
#endif
#ifdef BSP_UART9_TX_USING_DMA
uart_obj[UART9_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
static struct dma_config uart9_dma_tx = UART9_DMA_TX_CONFIG;
uart_config[UART9_INDEX].dma_tx = &uart9_dma_tx;
#endif
#endif
#ifdef BSP_USING_UART10
uart_obj[UART10_INDEX].uart_dma_flag = 0;
#ifdef BSP_UART10_RX_USING_DMA
uart_obj[UART10_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
static struct dma_config uart10_dma_rx = UART10_DMA_RX_CONFIG;
uart_config[UART10_INDEX].dma_rx = &uart10_dma_rx;
#endif
#ifdef BSP_UART10_TX_USING_DMA
uart_obj[UART10_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
static struct dma_config uart10_dma_tx = UART10_DMA_TX_CONFIG;
uart_config[UART10_INDEX].dma_tx = &uart10_dma_tx;
#endif
#endif
} }
#ifdef RT_SERIAL_USING_DMA
static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
{ {
struct rt_serial_rx_fifo *rx_fifo; struct rt_serial_rx_fifo *rx_fifo;

348
project.uvoptx
View File

@@ -303,8 +303,8 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>rt-thread\components\libc\cplusplus\cxx_Semaphore.cpp</PathWithFileName> <PathWithFileName>rt-thread\components\libc\cplusplus\cxx_Mutex.cpp</PathWithFileName>
<FilenameWithoutPath>cxx_Semaphore.cpp</FilenameWithoutPath> <FilenameWithoutPath>cxx_Mutex.cpp</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
@@ -327,8 +327,8 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>rt-thread\components\libc\cplusplus\cxx_Mutex.cpp</PathWithFileName> <PathWithFileName>rt-thread\components\libc\cplusplus\cxx_Semaphore.cpp</PathWithFileName>
<FilenameWithoutPath>cxx_Mutex.cpp</FilenameWithoutPath> <FilenameWithoutPath>cxx_Semaphore.cpp</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
@@ -568,7 +568,7 @@
<Group> <Group>
<GroupName>Drivers</GroupName> <GroupName>Drivers</GroupName>
<tvExp>1</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@@ -683,18 +683,6 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>rt-thread\components\fal\src\fal_partition.c</PathWithFileName>
<FilenameWithoutPath>fal_partition.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>39</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>rt-thread\components\fal\src\fal_flash.c</PathWithFileName> <PathWithFileName>rt-thread\components\fal\src\fal_flash.c</PathWithFileName>
<FilenameWithoutPath>fal_flash.c</FilenameWithoutPath> <FilenameWithoutPath>fal_flash.c</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@@ -702,7 +690,7 @@
</File> </File>
<File> <File>
<GroupNumber>6</GroupNumber> <GroupNumber>6</GroupNumber>
<FileNumber>40</FileNumber> <FileNumber>39</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@@ -714,7 +702,7 @@
</File> </File>
<File> <File>
<GroupNumber>6</GroupNumber> <GroupNumber>6</GroupNumber>
<FileNumber>41</FileNumber> <FileNumber>40</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
@@ -724,6 +712,18 @@
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>41</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>rt-thread\components\fal\src\fal_partition.c</PathWithFileName>
<FilenameWithoutPath>fal_partition.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group> </Group>
<Group> <Group>
@@ -763,8 +763,8 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>rt-thread\components\finsh\msh_parse.c</PathWithFileName> <PathWithFileName>rt-thread\components\finsh\cmd.c</PathWithFileName>
<FilenameWithoutPath>msh_parse.c</FilenameWithoutPath> <FilenameWithoutPath>cmd.c</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
@@ -775,8 +775,8 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>rt-thread\components\finsh\cmd.c</PathWithFileName> <PathWithFileName>rt-thread\components\finsh\msh_parse.c</PathWithFileName>
<FilenameWithoutPath>cmd.c</FilenameWithoutPath> <FilenameWithoutPath>msh_parse.c</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
@@ -979,8 +979,8 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c</PathWithFileName> <PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_flash_ex.c</FilenameWithoutPath> <FilenameWithoutPath>stm32f4xx_hal_cec.c</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
@@ -991,90 +991,6 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_uart.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>62</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_rcc_ex.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>63</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_crc.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>64</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_cryp_ex.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>65</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_pwr_ex.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>66</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_dma.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>67</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_usart.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>68</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c</PathWithFileName> <PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_pwr.c</FilenameWithoutPath> <FilenameWithoutPath>stm32f4xx_hal_pwr.c</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
@@ -1082,43 +998,79 @@
</File> </File>
<File> <File>
<GroupNumber>10</GroupNumber> <GroupNumber>10</GroupNumber>
<FileNumber>69</FileNumber> <FileNumber>62</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_iwdg.c</PathWithFileName> <PathWithFileName>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c</PathWithFileName>
<FilenameWithoutPath>stm32f4xx_hal_iwdg.c</FilenameWithoutPath> <FilenameWithoutPath>stm32f4xx_hal_crc.c</FilenameWithoutPath>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>
<bShared>0</bShared> <bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>10</GroupNumber> <GroupNumber>10</GroupNumber>
<FileNumber>70</FileNumber> <FileNumber>63</FileNumber>
<FileType>1</FileType> <FileType>1</FileType>
<tvExp>0</tvExp> <tvExp>0</tvExp>
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192
project.uvprojx
View File

@@ -337,9 +337,9 @@
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<FileName>stm32f4xx_hal_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_rng.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_cortex.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_can.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_can.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_cryp.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c</FilePath>
</File> </File>
<File> <File>
<FileName>stm32f4xx_hal_flash_ramfunc.c</FileName> <FileName>stm32f4xx_hal_flash_ramfunc.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c</FilePath> <FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c</FilePath>
</File> </File>
<File>
<FileName>system_stm32f4xx.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_cryp.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_cortex.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c</FilePath>
</File>
<File> <File>
<FileName>stm32f4xx_hal.c</FileName> <FileName>stm32f4xx_hal.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c</FilePath> <FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c</FilePath>
</File> </File>
<File> <File>
<FileName>stm32f4xx_hal_wwdg.c</FileName> <FileName>stm32f4xx_hal_gpio.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_wwdg.c</FilePath> <FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c</FilePath>
</File> </File>
<File> <File>
<FileName>stm32f4xx_hal_cec.c</FileName> <FileName>stm32f4xx_hal_cryp_ex.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c</FilePath> <FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_dma.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_rcc.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_rng.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_flash_ex.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_rcc_ex.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_can.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_can.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_uart.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c</FilePath>
</File> </File>
<File> <File>
<FileName>stm32f4xx_hal_flash.c</FileName> <FileName>stm32f4xx_hal_flash.c</FileName>
@@ -834,9 +814,29 @@
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c</FilePath> <FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c</FilePath>
</File> </File>
<File> <File>
<FileName>system_stm32f4xx.c</FileName> <FileName>stm32f4xx_hal_wwdg.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c</FilePath> <FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_wwdg.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_iwdg.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_iwdg.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_dma_ex.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_pwr_ex.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c</FilePath>
</File>
<File>
<FileName>stm32f4xx_hal_usart.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>

11
rt-thread/components/drivers/include/drivers/serial.h
View File

@@ -109,6 +109,14 @@ struct serial_configure
rt_uint32_t reserved :5; rt_uint32_t reserved :5;
}; };
struct serial_sem_cfg
{
rt_sem_t sem_rx;
rt_sem_t sem_tx;
};
#define RT_SERIAL_CTRL_CONFIG_SEM 0x30
/* /*
* Serial FIFO mode * Serial FIFO mode
*/ */
@@ -150,6 +158,9 @@ struct rt_serial_device
void *serial_rx; void *serial_rx;
void *serial_tx; void *serial_tx;
rt_sem_t sem_rx;
rt_sem_t sem_tx;
}; };
typedef struct rt_serial_device rt_serial_t; typedef struct rt_serial_device rt_serial_t;

28
rt-thread/components/drivers/serial/serial.c
View File

@@ -1225,6 +1225,20 @@ static rt_err_t rt_serial_control(struct rt_device *dev,
} }
break; break;
#endif /* RT_USING_POSIX_STDIO */ #endif /* RT_USING_POSIX_STDIO */
case RT_SERIAL_CTRL_CONFIG_SEM:
if (args && serial->parent.ref_count)
{
ret = RT_EBUSY;
break;
}
if (args)
{
struct serial_sem_cfg *cfg = args;
serial->sem_rx = cfg->sem_rx;
serial->sem_tx = cfg->sem_tx;
}
break;
default : default :
/* control device */ /* control device */
ret = serial->ops->control(serial, cmd, args); ret = serial->ops->control(serial, cmd, args);
@@ -1330,7 +1344,7 @@ void rt_hw_serial_isr(struct rt_serial_device *serial, int event)
} }
/* invoke callback */ /* invoke callback */
if (serial->parent.rx_indicate != RT_NULL) if (serial->parent.rx_indicate != RT_NULL || serial->sem_rx != RT_NULL)
{ {
rt_size_t rx_length; rt_size_t rx_length;
@@ -1342,7 +1356,11 @@ void rt_hw_serial_isr(struct rt_serial_device *serial, int event)
if (rx_length) if (rx_length)
{ {
serial->parent.rx_indicate(&serial->parent, rx_length); if (serial->sem_rx != RT_NULL)
rt_sem_release(serial->sem_rx);
if (serial->parent.rx_indicate != RT_NULL)
serial->parent.rx_indicate(&serial->parent, rx_length);
} }
} }
break; break;
@@ -1378,6 +1396,9 @@ void rt_hw_serial_isr(struct rt_serial_device *serial, int event)
} }
/* invoke callback */ /* invoke callback */
if (serial->sem_tx != RT_NULL)
rt_sem_release(serial->sem_tx);
if (serial->parent.tx_complete != RT_NULL) if (serial->parent.tx_complete != RT_NULL)
{ {
serial->parent.tx_complete(&serial->parent, (void*)last_data_ptr); serial->parent.tx_complete(&serial->parent, (void*)last_data_ptr);
@@ -1414,6 +1435,9 @@ void rt_hw_serial_isr(struct rt_serial_device *serial, int event)
/* enable interrupt */ /* enable interrupt */
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
/* invoke callback */ /* invoke callback */
if (serial->sem_rx != RT_NULL)
rt_sem_release(serial->sem_rx);
if (serial->parent.rx_indicate != RT_NULL) if (serial->parent.rx_indicate != RT_NULL)
{ {
serial->parent.rx_indicate(&(serial->parent), length); serial->parent.rx_indicate(&(serial->parent), length);

22
rtconfig.h
View File

@@ -214,12 +214,34 @@
#define BSP_USING_GPIO #define BSP_USING_GPIO
#define BSP_USING_UART #define BSP_USING_UART
#define BSP_USING_UART1 #define BSP_USING_UART1
#define BSP_UART1_RX_USING_DMA
#define BSP_UART1_TX_USING_DMA
#define BSP_USING_UART2 #define BSP_USING_UART2
#define BSP_UART2_RX_USING_DMA #define BSP_UART2_RX_USING_DMA
#define BSP_UART2_TX_USING_DMA #define BSP_UART2_TX_USING_DMA
#define BSP_USING_UART3
#define BSP_UART3_RX_USING_DMA
#define BSP_UART3_TX_USING_DMA
#define BSP_USING_UART4
#define BSP_UART4_RX_USING_DMA
#define BSP_UART4_TX_USING_DMA
#define BSP_USING_UART5
#define BSP_UART5_RX_USING_DMA
#define BSP_UART5_TX_USING_DMA
#define BSP_USING_UART6
#define BSP_UART6_RX_USING_DMA
#define BSP_UART6_TX_USING_DMA
#define BSP_USING_UART7
#define BSP_USING_UART8
#define BSP_USING_UART9
#define BSP_UART9_TX_USING_DMA
#define BSP_USING_UART10
#define BSP_UART10_RX_USING_DMA
#define BSP_UART10_TX_USING_DMA
#define BSP_USING_CAN #define BSP_USING_CAN
#define BSP_USING_CAN1 #define BSP_USING_CAN1
#define BSP_USING_CAN2 #define BSP_USING_CAN2
#define BSP_USING_CAN3
#define BSP_USING_ON_CHIP_FLASH #define BSP_USING_ON_CHIP_FLASH
/* Board extended module Drivers */ /* Board extended module Drivers */